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2.3GHz to 2.7GHz MIMO Wireless
BroadbandRF Transceiver
SPI Register Definitions
(All values in the register definition table are typical numbers. The MAX2839AS SPI does not have a power-on-default feature; the
user must program all SPI addresses for normal operation. Prior to use of any untested settings, contact the factory.)
Table 2. MAX2839AS Register Summary
REGISTER NO.
0
1
2
3
4
5
6
REGISTER NAME
RX_ENABLE
RX_RF_1
RX_RF_2
RX_RF/LPF
LPF
LPF/VGA_1
LPF/VGA_2
DEFAULT
000
00C
081
1B9
3E6
100
000
FUNCTIONS
Reserved for internal use
? LNA band select, MIMO mode select
? Rx I/Q phase error correction
? LNA gain SPI control enable
? Rx I/Q phase error SPI control enable
Reserved for internal use
? RF channel bandwidth select
? RX_A LNA and VGA gain controls
? LPF operating mode select
? RX_B LNA and VGA gain controls
? Rx VGA common-mode select
? RSSI pin output select, operating mode as a function of RXHP, and receiver
7
RSSI/VGA
208
select
? Rx baseband outputs routing select
8
9
10
11
12
13
RX_TOP_SPI_1
RX_TOP_SPI_2
TX_TOP_ SPI
TEMP_SEN
HPFSM 1
HPFSM 2
222
018
00C
004
24F
150
? Rx VGA gain SPI control enable
? LPF operating mode select enable
? Temperature sensor enable, and ADC readout trigger
? DOUT output selection, drive select, three-state output select
? Tx AM detector gain and filter bandwidth controls
? Temperature sensor ADC readout
? 10MHz HPC duration select when triggered by RXEN or LNA gain
? 600kHz HPC duration select when triggered by RXEN or LNA gain
? 100kHz HPC duration select when triggered by RXEN or LNA gain
? 30kHz HPC duration select when triggered by RXEN or LNA gain
? 1kHz HPC duration select when triggered by RXEN
14
HPFSM 3
3C5
?
?
?
?
1kHz HPC duration select when triggered by LNA gain
HPC rising edge delay and final highpass corner select
HPC on-hold corner select as a function of RXHP
HPC state machine retriggered by LNA gain enable
15
16
17
18
19
20
21
HPFSM 4
BLK_SPI_EN
FRAC_DIV_1
FRAC_DIV_2
INT_DIV
SYNTH_CONFIG_1
SYNTH_CONFIG_2
201
01C
155
155
153
249
02D
? HPC state machine clock divider, sequence bypass, and RXHP dependent
select
? Block enabled by SPI
? Last 10 of 20 fractional divider bits
? First 10 of 20 fractional divider bits
? Integer divider bits
? LO generation band select
? Reference divider ratio
? CLKOUT buffer drive select
Reserved for internal use
______________________________________________________________________________________
23
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